{"title":"Shannon Expansion Based Supply-Gated Logic for Improved Power and Testability","authors":"Swaroop Ghosh, S. Bhunia, K. Roy","doi":"10.1109/ATS.2005.98","DOIUrl":null,"url":null,"abstract":"Structural transformation of a design to enhance its testability while satisfying design constraints on power and performance, can result in improved test cost and test confidence. In this paper, we analyze the testability in a new style of logic design based on Shannon’s decomposition and supply gating. We observe that tree structure of a logic circuit due to Shannon’s decomposition makes it intrinsically more testable than conventionally synthesized circuit, while at the same time entailing an improvement in active power. We have analyzed three different aspects of testability of a circuit: a) IDDQ test sensitivity b) test power during scan-based testing, and c) test length (for both ATPG-generated deterministic and random patterns). Simulation results on a set of MCNC benchmarks show promising results on all the above aspects. We have also demonstrated that the new logic structure can improve parametric yield of a circuit under process variations when considering a bound on circuit leakage.","PeriodicalId":373563,"journal":{"name":"14th Asian Test Symposium (ATS'05)","volume":"76 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"14th Asian Test Symposium (ATS'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.2005.98","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
Structural transformation of a design to enhance its testability while satisfying design constraints on power and performance, can result in improved test cost and test confidence. In this paper, we analyze the testability in a new style of logic design based on Shannon’s decomposition and supply gating. We observe that tree structure of a logic circuit due to Shannon’s decomposition makes it intrinsically more testable than conventionally synthesized circuit, while at the same time entailing an improvement in active power. We have analyzed three different aspects of testability of a circuit: a) IDDQ test sensitivity b) test power during scan-based testing, and c) test length (for both ATPG-generated deterministic and random patterns). Simulation results on a set of MCNC benchmarks show promising results on all the above aspects. We have also demonstrated that the new logic structure can improve parametric yield of a circuit under process variations when considering a bound on circuit leakage.