Delay estimation for technology independent synthesis

Y. Tamiya
{"title":"Delay estimation for technology independent synthesis","authors":"Y. Tamiya","doi":"10.1109/ASPDAC.1997.600054","DOIUrl":null,"url":null,"abstract":"This paper proposes path mapping, a method of delay estimation for technology independent combinational circuits. Path mapping provides fast and accurate delay estimation using the common ideas of tree covering technology mapping. First, path mapping performs technology mapping for all paths in the circuit with minimum delay. Then, it finds the most critical path among all the paths in the circuit. Finally, it answers its path delay as the circuit delay. Experimental results show path mapping estimates more accurate circuit delay than unit delay, and runs much faster than the technology mapper.","PeriodicalId":242487,"journal":{"name":"Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-01-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.1997.600054","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

This paper proposes path mapping, a method of delay estimation for technology independent combinational circuits. Path mapping provides fast and accurate delay estimation using the common ideas of tree covering technology mapping. First, path mapping performs technology mapping for all paths in the circuit with minimum delay. Then, it finds the most critical path among all the paths in the circuit. Finally, it answers its path delay as the circuit delay. Experimental results show path mapping estimates more accurate circuit delay than unit delay, and runs much faster than the technology mapper.
技术独立综合的时延估计
本文提出了一种技术无关组合电路的时延估计方法——路径映射。路径映射利用树覆盖技术映射的一般思想提供了快速准确的延迟估计。首先,路径映射以最小的延迟对电路中的所有路径进行技术映射。然后,从电路中所有路径中找出最关键的路径。最后,将其路径延迟作为电路延迟。实验结果表明,路径映射比单元延迟估计更准确,运行速度比技术映射快得多。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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