Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors

M. Aoulaiche, E. Simoen, R. Ritzenthaler, T. Schram, H. Arimura, M. Cho, T. Kauerauf, G. Groeseneken, N. Horiguchi, A. Thean, A. Federico, F. Crupi, A. Spessot, C. Caillat, P. Fazan, H.-J. Na, Y. Son, K. B. Noh
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引用次数: 9

Abstract

The impact of the Al2O3 position with respect to HfO2 in the process flow, is investigated. It is shown that Al2O3 incorporation in order to increase the pMOS threshold voltage, slightly degrades the mobility, slightly increases NBTI and increases the EOT with respect to the reference without Al2O3 Moreover, the trap density profiles depend on the Al2O3 position: higher in the interfacial layer when Al2O3 is below and higher in the HfO2 when Al2O3 is above HfO2. Furthermore, Al2O3 below HfO2 shows higher gate leakage, reduced LF noise but marginal NBTI difference compared to AL2O3 above HfO2.
Al2O3位置对高k金属门控DRAM外围晶体管性能和可靠性的影响
研究了工艺流程中Al2O3相对于HfO2的位置的影响。结果表明,加入Al2O3以提高pMOS阈值电压,会略微降低迁移率,略微增加NBTI和EOT。此外,陷阱密度分布取决于Al2O3的位置:当Al2O3低于HfO2时,陷阱密度在界面层中较高,当Al2O3高于HfO2时,陷阱密度在HfO2中较高。此外,与HfO2以上的Al2O3相比,低于HfO2的Al2O3具有更高的栅极泄漏,降低了LF噪声,但NBTI差异很小。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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