CPU Generated Binary and Ternary Loads for Power Delivery Assessment

2007 IEEE Electrical Performance of Electronic Packaging Pub Date : 2007-11-21 DOI:10.1109/EPEP.2007.4387108

W. Lambert, R. Ayyanar

引用次数: 4

Abstract

CPU generated loads useful for analysis and characterization of microprocessor power delivery networks are described along with potential applications. The loads are generated by a functional microprocessor operating in PLL BYPASS mode.

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CPU产生的二元和三元负载的电力输送评估

CPU产生的负载对微处理器供电网络的分析和表征有用，并描述了潜在的应用。负载由在锁相环旁路模式下工作的功能性微处理器产生。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2007 IEEE Electrical Performance of Electronic Packaging

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