{"title":"Complementary TFTs and Inverters on Flexible Plastic Substrates Using Si(100) Nanomembranes","authors":"H. Pang, Hao-Chih Yuan, Z. Ma, G. Celler","doi":"10.1109/SMIC.2008.38","DOIUrl":null,"url":null,"abstract":"The first complementary thin-film transistor (TFTs) and complementary inverter employing single-crystal Si (100) nanomembranes are demonstrated on a low-temperature flexible plastic substrate. Combined high-temperate and low-temperature processes are employed to enable the integration of both n-and p-channel TFTs (N-TFT and P-TFT) on the same piece of single-crystal Si nanomembrane and to enable the compatibility of the device fabrication with the low-temperature plastic substrate. Under a bias voltage (VDD) of 5 V, the inverters exhibit a gain of 5.88 and switching threshold voltage VM of 2.5 V. The high and low noise margins of the inverter are 2.05 V and 2 V, respectively. These demonstrations may eventually lead to low-power digital switching applications using transferable Si nanomembrane on flexible substrates.","PeriodicalId":350325,"journal":{"name":"2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMIC.2008.38","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The first complementary thin-film transistor (TFTs) and complementary inverter employing single-crystal Si (100) nanomembranes are demonstrated on a low-temperature flexible plastic substrate. Combined high-temperate and low-temperature processes are employed to enable the integration of both n-and p-channel TFTs (N-TFT and P-TFT) on the same piece of single-crystal Si nanomembrane and to enable the compatibility of the device fabrication with the low-temperature plastic substrate. Under a bias voltage (VDD) of 5 V, the inverters exhibit a gain of 5.88 and switching threshold voltage VM of 2.5 V. The high and low noise margins of the inverter are 2.05 V and 2 V, respectively. These demonstrations may eventually lead to low-power digital switching applications using transferable Si nanomembrane on flexible substrates.