I/sub DDT/ testing

Abstract

The industry has accepted I/sub DDQ/ testing to detect CMOS IC defects. While I/sub DDT/ testing needs more research to be applicable in practice. However, it is noticed that observing the average transient current can lead to improvements in real defect coverage. This paper presents a formal procedure to identify I/sub DDT/ testable faults, and to generate input vector pairs to detect the faults based on Boolean process. It is interesting to note that those faults may not be detected by I/sub DDQ/ or other test methods, which shows the significance of I/sub DDT/ testing.