{"title":"Continuous-time delta-sigma modulator with an upfront passive-RC low-pass network","authors":"Daxiang Li, Yang Zhang, D. Basak, K. Pun","doi":"10.1109/ISOCC.2017.8368776","DOIUrl":null,"url":null,"abstract":"A power-efficient third-order single-bit continuous-time Delta-Sigma modulator (CTDSM) with an upfront low-pass network (LPN) is presented. The passive LPN functions as an adder and a filter that realizes a noise transfer function zero and reduces the signal swing at the input of the subsequent active integrator. Transistor-level simulation results in 0.18μm CMOS show that the proposed CTDSM achieves 71.1-dB SNDR over a bandwidth of 2 MHz with a sampling frequency of 256 MHz, while consuming 124.5 μW power from a 1.8-V supply.","PeriodicalId":248826,"journal":{"name":"2017 International SoC Design Conference (ISOCC)","volume":"138 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International SoC Design Conference (ISOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISOCC.2017.8368776","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
A power-efficient third-order single-bit continuous-time Delta-Sigma modulator (CTDSM) with an upfront low-pass network (LPN) is presented. The passive LPN functions as an adder and a filter that realizes a noise transfer function zero and reduces the signal swing at the input of the subsequent active integrator. Transistor-level simulation results in 0.18μm CMOS show that the proposed CTDSM achieves 71.1-dB SNDR over a bandwidth of 2 MHz with a sampling frequency of 256 MHz, while consuming 124.5 μW power from a 1.8-V supply.