Routing considerations in symbolic layout synthesis

Abstract

The authors discuss routing styles, including a newly proposed hybrid routing style, in basic silicon-level design for a symbolic layout synthesis tool with practical considerations for design rules and process technology. Methods for systematically adding jogs in the layout to achieve high layout quality are proposed. Algorithms for input/output-pin assignment and for pin-ordering routing that achieve a minimal number of vias are also presented. Experiments on real industry designs showed promising results.<>