Leading zero anticipation for latency improvement in floating-point fused multiply-add units

Abstract

The leading zero anticipation (LZA) is vital in the floating-point fused multiply-add (FMA) units. The general LZA algorithms can only deal with 2 operands. It increases the critical path delay of high performance floating-point FMA units. The paper presents a novel LZA algorithm to deal with 3 operands directly and implemented the 106-bit leading zero anticipator in the high performance floating-point FMA with the general LZA algorithm and the proposed LZA algorithm respectively. Compared with the general leading zero anticipator, the proposed leading zero anticipator can reduce the delay of the critical path by 16.67% and reduce the area by 19.63% approximately.