Design of high performance sense amplifier using independent gate control in sub-50nm double-gate MOSFET

S. Mukhopadhyay, H. Mahmoodi, K. Roy
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引用次数: 29

Abstract

The double-gate (DG) transistor has emerged as the most promising device for nanoscale circuit design. Independent control of front and back gate in DG devices can be effectively used to improve performance and reduce power in sub-50 nm circuits. In this paper, we propose a high-performance sense-amplifier design using independent gate control in symmetric and asymmetric DG devices. The proposed design reduces the sensing delay of the sense amplifier by 30-35% and dynamic power by 10% (at 6 GHz) from the connected gate design.
采用独立栅极控制的亚50nm双栅极MOSFET的高性能感测放大器设计
双栅(DG)晶体管已成为纳米级电路设计中最有前途的器件。在50nm以下的电路中,独立控制DG器件的前后门可以有效地提高性能并降低功耗。在本文中,我们提出了一种在对称和非对称DG器件中使用独立门控制的高性能感测放大器设计。与连接栅极设计相比,该设计将传感放大器的传感延迟降低了30-35%,动态功率降低了10%(在6 GHz时)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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