High-Gain and Fast-Setting OTA for high Speed and high Resolution ADC

Yong Zhang, Ting Li, Zhengbo Huang, Yabo Ni, D. Fu
{"title":"High-Gain and Fast-Setting OTA for high Speed and high Resolution ADC","authors":"Yong Zhang, Ting Li, Zhengbo Huang, Yabo Ni, D. Fu","doi":"10.1109/EDSSC.2018.8487158","DOIUrl":null,"url":null,"abstract":"A two stage Gainboost OTA for high speed and high resolution Pipeline ADC is presented. Negative impedance compensation and Negative capacitance compensation are used to promote OTA DC gain and closeloop feedback coefficient; High resistances are in series connection between substrate of pmos and supply to decrease the output parasitic capacitor.Meanwhile, reset switchs are in parallel with high resistances to aviod voltage drift.The simulation of proposed circuit results in 83dB Loop DC gain, 4.3GHz Closeloop Bandwidth, and 63 degree phase margin.","PeriodicalId":279745,"journal":{"name":"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2018.8487158","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

Abstract

A two stage Gainboost OTA for high speed and high resolution Pipeline ADC is presented. Negative impedance compensation and Negative capacitance compensation are used to promote OTA DC gain and closeloop feedback coefficient; High resistances are in series connection between substrate of pmos and supply to decrease the output parasitic capacitor.Meanwhile, reset switchs are in parallel with high resistances to aviod voltage drift.The simulation of proposed circuit results in 83dB Loop DC gain, 4.3GHz Closeloop Bandwidth, and 63 degree phase margin.
用于高速和高分辨率ADC的高增益和快速设置OTA
提出了一种用于高速高分辨率流水线ADC的两级增益增益OTA。采用负阻抗补偿和负电容补偿提高OTA直流增益和闭环反馈系数;在pmos基板与电源之间串联高电阻,以减小输出寄生电容。同时,复位开关并联高电阻,避免电压漂移。仿真结果表明,该电路环路直流增益为83dB,闭环带宽为4.3GHz,相位裕度为63度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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