On-chip analog floating-gate array programming in a submicron standard CMOS process using high voltage charge pumps

Abstract

This paper presents a novel design of on-chip programming for floating-gate arrays in a 0.5 /spl mu/m standard CMOS N-well double poly process. Described in this paper is the complete design for integrating on chip the floating-gate programming infrastructure for programming a 10/spl times/10 array: electron injection and tunneling charge pumps, on-chip clock, and all interfacing circuitry to the array and pads. The three stage high voltage charge pump (HVCP) is utilized to modulate electron injection and six stage Schottky charge pumps (SCHCP) are utilized to modulate tunneling. Experimental results of hot-electron injection and electron tunneling for a floating-gate element are presented as well as simulation results for the critical interfacing circuitry and for the on-chip clock.