{"title":"A Variability-Aware Analysis and Design Guideline for Write and Read Operations in Crosspoint STT-MRAM Arrays","authors":"Y. A. Belay, A. Cabrini, G. Torelli","doi":"10.1109/PRIME.2018.8430358","DOIUrl":null,"url":null,"abstract":"Beneliting from emerging resistance-switching mem- ory technologies, crosspoint array has become an attractive array architecture to obtain high storage density. Among the emerging technologies, Spin-Transfer Torque magnetic memory (STT-MRAM) is a potential candidate as storage class memory (SCM) or static/dynamic RAM replacement due to its high write speed, scalability and other interesting characteristics. In this paper, we present a variation-aware comprehensive analysis of the boundary conditions for write and read requirements for the implementation of crosspoint STT-MRAM Arrays. The results of the analysis are very useful as design guide and for choosing a suitable selector device for Crosspoint STT-MRAM arrays.","PeriodicalId":384458,"journal":{"name":"2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","volume":"96 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PRIME.2018.8430358","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Beneliting from emerging resistance-switching mem- ory technologies, crosspoint array has become an attractive array architecture to obtain high storage density. Among the emerging technologies, Spin-Transfer Torque magnetic memory (STT-MRAM) is a potential candidate as storage class memory (SCM) or static/dynamic RAM replacement due to its high write speed, scalability and other interesting characteristics. In this paper, we present a variation-aware comprehensive analysis of the boundary conditions for write and read requirements for the implementation of crosspoint STT-MRAM Arrays. The results of the analysis are very useful as design guide and for choosing a suitable selector device for Crosspoint STT-MRAM arrays.