Silicon-bipolar ASICs for 2.5 Gbit/s systems-designed and implemented both as full custom circuits and as personalized transistor arrays

Abstract

Silicon-bipolar ASICs for 2.5 Gbit/s systems were designed and implemented in different ways. A 4:1-multiplexer, a regenerator, and a 1:4-demultiplexer were realized as full custom circuits. In addition, a second regenerator was implemented using a transistor array. The first measurement results are quite satisfactory. All circuits work up to about 3 Gbit/s and the regenerators have an excellent retiming capability. The measured results agree well with the simulated values.<>