B. Tinkham, X. Guo, W. Braun, A. Trampert, K. Ploog
{"title":"Molecular beam epitaxy of Pr/sub 2/O/sub 3/on Si","authors":"B. Tinkham, X. Guo, W. Braun, A. Trampert, K. Ploog","doi":"10.1109/DRC.2005.1553068","DOIUrl":null,"url":null,"abstract":"Crystalline high-k oxides epitaxially grown on Si which allow further reduction of equivalent oxide thickness (EOT), are potential candidates for gate dielectrics in the 32 nm CMOS technology mode requiring EOT < 1 nm beyond 2013. Epitaxial growth of perovskite-type oxides on Si for gate dielectrics was demonstrated and high transistor mobility was achieved (McKee et al., 2001). Here we report on molecular beam epitaxy (MBE) of binary praseodymium oxide Pr2O3 on Si (001) which according to thermodynamics should be stable against silicon. Two different phases of Pr2O3exist, a cubic phase with a lattice constant of 11.152 Aring, and a hexagonal phase with a=3.8577 Aring and c=6.012 Aring (Burnham and Eyring, 1968 and Adachi and Imanaka, 1998). The misfit between a/2 of the cubic phase and the Si lattice constant is about 2.7%. The misfit in the (0001) plane of the hexagonal Pr2 O3relative to the (111) plane of Si is only 0.5%. Preliminary results show (Osten et al., 2001) that crystalline Pr2 O3grown on Si(001) is a promising candidate for scaled gate insulators, displaying sufficiently high-k (k=30) combined with ultra-low leakage current density (10-8 A/cm2 at V g0 = plusmn 1 V for EOT = 1.4 nm) and good reliability. It is crucial to avoid the formation of interlayers at the Pr2O 3/Si interface, as any low-k silicate-like layers represent a low capacity in series which deteriorates the desired capacity effect of the high-k oxide","PeriodicalId":306160,"journal":{"name":"63rd Device Research Conference Digest, 2005. DRC '05.","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"63rd Device Research Conference Digest, 2005. DRC '05.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2005.1553068","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Crystalline high-k oxides epitaxially grown on Si which allow further reduction of equivalent oxide thickness (EOT), are potential candidates for gate dielectrics in the 32 nm CMOS technology mode requiring EOT < 1 nm beyond 2013. Epitaxial growth of perovskite-type oxides on Si for gate dielectrics was demonstrated and high transistor mobility was achieved (McKee et al., 2001). Here we report on molecular beam epitaxy (MBE) of binary praseodymium oxide Pr2O3 on Si (001) which according to thermodynamics should be stable against silicon. Two different phases of Pr2O3exist, a cubic phase with a lattice constant of 11.152 Aring, and a hexagonal phase with a=3.8577 Aring and c=6.012 Aring (Burnham and Eyring, 1968 and Adachi and Imanaka, 1998). The misfit between a/2 of the cubic phase and the Si lattice constant is about 2.7%. The misfit in the (0001) plane of the hexagonal Pr2 O3relative to the (111) plane of Si is only 0.5%. Preliminary results show (Osten et al., 2001) that crystalline Pr2 O3grown on Si(001) is a promising candidate for scaled gate insulators, displaying sufficiently high-k (k=30) combined with ultra-low leakage current density (10-8 A/cm2 at V g0 = plusmn 1 V for EOT = 1.4 nm) and good reliability. It is crucial to avoid the formation of interlayers at the Pr2O 3/Si interface, as any low-k silicate-like layers represent a low capacity in series which deteriorates the desired capacity effect of the high-k oxide