Simplified Space Vector Modulation Strategy for Three-level Inverters

Abstract

This paper presents a simplified space vector modulation strategy for three-level inverter digital control applications. It avoids the complex trigonometric computations necessary for the conventional three-level space vector modulation strategy for sector identification and vector dwell time calculation by directly determining the phase duty ratios from the three-phase reference voltages. This implementation technique only involves few logic comparisons and arithmetic operations, so the code size and execution time are reduced by approximately 40 percent. Moreover, it achieves significantly lower neutral-point voltage ripple compared to the conventional three-level space vector modulation method for a wide range of modulation indices and load power factor values. The validity of the proposed modulation technique is verified using Opal-RT Hardware-in-the-Loop (HIL) simulation. The simulation results confirm that the proposed method ensures the required threelevel operation and dc-link capacitor voltage balancing.