Low-power adiabatic sequential circuits using two-phase power-clock supply

Yangbo Wu, Huiying Dong, Yi Wang, Jianping Hu
{"title":"Low-power adiabatic sequential circuits using two-phase power-clock supply","authors":"Yangbo Wu, Huiying Dong, Yi Wang, Jianping Hu","doi":"10.1109/ICASIC.2005.1611293","DOIUrl":null,"url":null,"abstract":"Complementary pass-transistor adiabatic logic (CPAL) circuits can be driven by two-phase or four-phase power-clocks. CPAL circuits have more efficient energy transfer and recovery, as the non-adiabatic energy loss of output loads has been completely eliminated using complementary pass-transistor logic for evaluation and transmission gates for energy-recovery. In this paper, the design of adiabatic asynchronous sequential circuits based on the two-phase CPAL is presented. A practical sequential system realized with two-phase CPAL circuits is demonstrated. A two-phase nonoverlap sinusoidal power clock circuit for the two-phase CPAL is also presented","PeriodicalId":431034,"journal":{"name":"2005 6th International Conference on ASIC","volume":"125 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 6th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICASIC.2005.1611293","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

Complementary pass-transistor adiabatic logic (CPAL) circuits can be driven by two-phase or four-phase power-clocks. CPAL circuits have more efficient energy transfer and recovery, as the non-adiabatic energy loss of output loads has been completely eliminated using complementary pass-transistor logic for evaluation and transmission gates for energy-recovery. In this paper, the design of adiabatic asynchronous sequential circuits based on the two-phase CPAL is presented. A practical sequential system realized with two-phase CPAL circuits is demonstrated. A two-phase nonoverlap sinusoidal power clock circuit for the two-phase CPAL is also presented
采用两相电源时钟供电的低功耗绝热顺序电路
互补通管绝热逻辑(CPAL)电路可以由两相或四相功率时钟驱动。CPAL电路具有更有效的能量传递和恢复,因为输出负载的非绝热能量损失已经完全消除,使用互补的通管逻辑进行评估和传输门进行能量恢复。本文提出了一种基于两相CPAL的绝热异步顺序电路的设计方法。介绍了一个用两相CPAL电路实现的实际串行系统。提出了一种两相非重叠正弦功率时钟电路
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信