Minimizing the search space for computing exact worst-case delays of AFDX periodic flows

Muhammad Adnan, Jean-Luc Scharbarg, C. Fraboul
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引用次数: 12

Abstract

AFDX (Avionics Full Duplex Switched Ethernet) standardized as ARINC 664 is a major upgrade for avionics systems. Guarantees on worst case end-to-end communication delays are required for certification purposes. These guarantees are obtained thanks to safe upper bounds computed by Network Calculus and Trajectory Approaches. Indeed, up to now, the computation of an exact worst case delay is intractable, except for very small configurations (less than 10 virtual links (VLs)). This paper proposes an algorithm which significantly increases the size of the configuration for which an exact worst case delay can be obtained (up to 50 VLs). This is achieved, thanks to a drastic reduction of the search space. For larger configurations (up to 100 VLs) the algorithm can be adapted to obtain reachable values for the end-to-end delay which are close to the exact worst case. Generalization to industrial configurations (more than 1000 flows) is under way.
最小化搜索空间以计算AFDX周期流的精确最坏情况延迟
AFDX(航空电子全双工交换以太网)标准为ARINC 664,是航空电子系统的主要升级。为了进行认证,需要对最坏情况下的端到端通信延迟进行保证。这些保证得益于网络演算和轨迹法计算的安全上界。事实上,到目前为止,除了非常小的配置(少于10个虚拟链路)之外,精确计算最坏情况下的延迟是难以处理的。本文提出了一种算法,该算法可以显著增加配置的大小,从而可以获得精确的最坏情况延迟(高达50 VLs)。由于极大地减少了搜索空间,这一点得以实现。对于更大的配置(高达100 VLs),该算法可以调整为获得接近最坏情况的端到端延迟的可达值。推广到工业配置(超过1000个流程)正在进行中。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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