{"title":"Mismatch Aware Analog Performance Macromodeling Using Spline Center and Range Regression on Adaptive Samples","authors":"Shubhankar Basu, Balaji Kommineni, R. Vemuri","doi":"10.1109/VLSI.2008.76","DOIUrl":null,"url":null,"abstract":"Analog design traditionally relies on designer's knowldge and expertise. Numerous automated synthesis methods have been proposed over the years; they reduce time complexity and explore wider design space. Manufacturing induced defects in the process parameters, render device characteristics inconsistent with their prediced behavior. Device mismatch causes significant variation in analog circuit performance. Monte Carlo simulation is known to be the most accurate method of measuring performance under random variation. But monte-carlo simulation is prohivitively expensive during synthesis process. In this work we present a novel Spline Center and Range Regression (SCRR) technique on adaptive samples to model performance in the presence of process variation. Mismatch aware macromodels can provide considerable speedup during synthesis with minimal loss in accuracy. Experimental results demonstrate the accuracy of the macromodels on an independent validation set using 180nm and 65nm technologies.","PeriodicalId":143886,"journal":{"name":"21st International Conference on VLSI Design (VLSID 2008)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2008-01-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"21st International Conference on VLSI Design (VLSID 2008)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSI.2008.76","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Analog design traditionally relies on designer's knowldge and expertise. Numerous automated synthesis methods have been proposed over the years; they reduce time complexity and explore wider design space. Manufacturing induced defects in the process parameters, render device characteristics inconsistent with their prediced behavior. Device mismatch causes significant variation in analog circuit performance. Monte Carlo simulation is known to be the most accurate method of measuring performance under random variation. But monte-carlo simulation is prohivitively expensive during synthesis process. In this work we present a novel Spline Center and Range Regression (SCRR) technique on adaptive samples to model performance in the presence of process variation. Mismatch aware macromodels can provide considerable speedup during synthesis with minimal loss in accuracy. Experimental results demonstrate the accuracy of the macromodels on an independent validation set using 180nm and 65nm technologies.