Recent advances in stress and activation engineering for high-performance logic transistors

Abstract

SOI technology is leading edge for high performance microprocessors. Performance per Watt is key and multiple core devices and their improved functionality are required to keep power comsumption low. AMD runs a unique transistor node to node progression model which devlivers at all times top notch performance from technology and lowers risk when moving to next technology generation. AMD gained leadership on strained Si and multi stressor integration. In a very mature state already DSL, SMT and SiGe. Besides stressors, advanced anneal is important to reduce diffusion and asymmetric device will help transistor performance. Reduction of parametric scattering is especially important for 45nm/32nm technology nodes. A special in-die measurement method has been developed to assess scattering in a thorough statistical way. Existing stressors like DSL, SMT, SiGe fully scale to 45nm pitches. HK/MG materials are the key for 32nm to keep GOX leakage under control and to allow gate scaling again.