Selective multiplexer-removal algorithm for lowering power consumption of circuits

Chi-Hoon Shin, Myeonghoon Oh, Young-Woo Kim, Sungnam Kim, Seongwoon Kim
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引用次数: 2

Abstract

In this paper we propose an algorithm about aggressive, but partial removal of multiplexers used for sharing functional units (FUs). By eliminating some multiplexers and duplicating the FU related, the proposed algorithm could be more advantageous for low power circuits than just keeping the multiplexers. To determine whether a removal of a group of multiplexers is beneficial or not, we compared a FU with multiplexers to multiple replications of the FU without any multiplexer under various conditions. Through the experiments, we aggregated information to be used for finding appropriate multiplexers to be extricated from circuit netlist; using the information, we built an automated algorithm to remove particular multiplexers; we applied it to a netlist of 16 bit processor. The processor that is newly generated by the algorithm consumed average about 12% less power than the initial processor.
降低电路功耗的选择性多路器去除算法
在本文中,我们提出了一种用于共享功能单元(FUs)的多路复用器的主动但部分去除算法。通过消除一些多路复用器并复制相关的FU,所提出的算法可能比仅保留多路复用器更有利于低功耗电路。为了确定移除一组多路复用器是否有益,我们将带有多路复用器的FU与在不同条件下没有任何多路复用器的FU的多个复制进行了比较。通过实验,我们收集信息,用于从电路网络表中找到合适的多路复用器;利用这些信息,我们建立了一个自动算法来删除特定的多路复用器;我们将其应用于一个16位处理器的网表。该算法生成的新处理器比初始处理器平均功耗低12%左右。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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