TFSOI BiCMOS technology for low power applications

W.M. Huang, K. Klein, M. Grimaldi, M. Racanelli, S. Ramaswami, T. Tsao, J. Foerstner, B. Hwang
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引用次数: 14

Abstract

A thin film silicon on insulator BiCMOS technology has been developed for low power applications. The technology is based on a manufacturable, near-fully-depleted 0.5 /spl mu/m CMOS process with the lateral bipolar device integrated as a drop-in module for BiCMOS circuits. The bipolar device structure emphasizes use of a silicided polysilicon base contact to reduce base resistance and minimize current crowding effects. A split-oxide spacer integration is used to define the bipolar base and emitter widths independently. Low current ECL gate speeds up to 2/spl times/ faster than bulk double-polysilicon self-aligned bipolar circuits have been demonstrated.<>
低功耗应用的TFSOI BiCMOS技术
一种用于低功耗应用的绝缘体上硅薄膜BiCMOS技术已经被开发出来。该技术基于可制造的、几乎完全耗尽的0.5 /spl mu/m CMOS工艺,并将侧双极器件集成为BiCMOS电路的插入式模块。双极器件结构强调使用硅化多晶硅基极触点来减少基极电阻和最小化电流拥挤效应。一个分裂-氧化物间隔集成被用来单独定义双极基极和发射极宽度。低电流ECL栅极速度高达2/spl倍/比大块双多晶硅自对准双极电路快。
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