Silicon nano-crystals based MOS memory and effects of traps on charge storage characteristics

Abstract

MOS memory device with a silicon nanocrystal based floating gate on a very narrow channel has been fabricated. Large threshold voltage shifts of up to 1V are obtained by applying a small electric field to the tunnel oxide for write/erase operation. Furthermore, charge storage characteristics have been investigated in the MOS diodes, where various interface traps and defects were introduced by thermal annealing treatment.