{"title":"An Integrated Expert System Environment For DFM In Surface Mount PCB Assembly","authors":"H. Ugur, K. Srihari","doi":"10.1109/IEMT.1992.639867","DOIUrl":null,"url":null,"abstract":"Surface Mount Technology (SMT) has emerged as the alternative to through hole technology in the Printed Circuit Board (PCB) domain. SMT ,311ows for decreased component sizes, increased performance, and better packing densities. The complexity of SMT coupled with the need to rapidly cope with market changes has necessitated the integration of the design and manufacturing processe 3. The need to remain competitive has resulted in the need to efficiently design a PCB considering manufacturability, testability, reliability, and cost. This research describes an Integrated Expert System Environment (IESE) that helps promote concurrer t engineering of PCB substrates. The IESE and its component sub-systems were developed on a workstation using LISP. The constrL ction of the IESE and its component subsystems is described. Tne inputs and outputs of each sub-system are addressed. Ideas for further research are presented.","PeriodicalId":403090,"journal":{"name":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"140 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-09-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Thirteenth IEEE/CHMT International Electronics Manufacturing Technology Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.1992.639867","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Surface Mount Technology (SMT) has emerged as the alternative to through hole technology in the Printed Circuit Board (PCB) domain. SMT ,311ows for decreased component sizes, increased performance, and better packing densities. The complexity of SMT coupled with the need to rapidly cope with market changes has necessitated the integration of the design and manufacturing processe 3. The need to remain competitive has resulted in the need to efficiently design a PCB considering manufacturability, testability, reliability, and cost. This research describes an Integrated Expert System Environment (IESE) that helps promote concurrer t engineering of PCB substrates. The IESE and its component sub-systems were developed on a workstation using LISP. The constrL ction of the IESE and its component subsystems is described. Tne inputs and outputs of each sub-system are addressed. Ideas for further research are presented.