{"title":"A fast self-reacting capacitor-less low-dropout regulator","authors":"Chia-Min Chen, C. Hung","doi":"10.1109/ESSCIRC.2011.6044985","DOIUrl":null,"url":null,"abstract":"A fast self-reacting (FSR) low-dropout (LDO) regulator with triple transient improved loops was implemented in 0.35μm CMOS technology. The proposed regulator for SoC application can achieve high stability for load current from zero to 100mA. The FSR loops can accelerate load transient responses while the regulator achieves the FOM of only 0.00675 (ps) without an output capacitor. The experimental results show the load regulation of 75.2 μV/mA and line regulation of 1.046 mV/V. The whole LDO chip consumes a quiescent current of 27 μA with an ultra low dropout voltage of 142mV at the maximum output current of 100mA. The proposed FSR transient improved loops can effectively reduce the transient voltage undershoot and overshoot. While the load current switches between 0 and 100 mA with both rise and fall time of 1 μs, the result shows that the maximum undershoot is 25 mV and that the maximum overshoot is 5 mV. When the full load current is 100mA, the undershoot and the overshoot of the line transient response are 4 mV and 6.5 mV, respectively, for a 1 V step supply waveform with 5 μs transient time.","PeriodicalId":239979,"journal":{"name":"2011 Proceedings of the ESSCIRC (ESSCIRC)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"27","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 Proceedings of the ESSCIRC (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2011.6044985","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 27
Abstract
A fast self-reacting (FSR) low-dropout (LDO) regulator with triple transient improved loops was implemented in 0.35μm CMOS technology. The proposed regulator for SoC application can achieve high stability for load current from zero to 100mA. The FSR loops can accelerate load transient responses while the regulator achieves the FOM of only 0.00675 (ps) without an output capacitor. The experimental results show the load regulation of 75.2 μV/mA and line regulation of 1.046 mV/V. The whole LDO chip consumes a quiescent current of 27 μA with an ultra low dropout voltage of 142mV at the maximum output current of 100mA. The proposed FSR transient improved loops can effectively reduce the transient voltage undershoot and overshoot. While the load current switches between 0 and 100 mA with both rise and fall time of 1 μs, the result shows that the maximum undershoot is 25 mV and that the maximum overshoot is 5 mV. When the full load current is 100mA, the undershoot and the overshoot of the line transient response are 4 mV and 6.5 mV, respectively, for a 1 V step supply waveform with 5 μs transient time.