A fast self-reacting capacitor-less low-dropout regulator

Chia-Min Chen, C. Hung
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引用次数: 27

Abstract

A fast self-reacting (FSR) low-dropout (LDO) regulator with triple transient improved loops was implemented in 0.35μm CMOS technology. The proposed regulator for SoC application can achieve high stability for load current from zero to 100mA. The FSR loops can accelerate load transient responses while the regulator achieves the FOM of only 0.00675 (ps) without an output capacitor. The experimental results show the load regulation of 75.2 μV/mA and line regulation of 1.046 mV/V. The whole LDO chip consumes a quiescent current of 27 μA with an ultra low dropout voltage of 142mV at the maximum output current of 100mA. The proposed FSR transient improved loops can effectively reduce the transient voltage undershoot and overshoot. While the load current switches between 0 and 100 mA with both rise and fall time of 1 μs, the result shows that the maximum undershoot is 25 mV and that the maximum overshoot is 5 mV. When the full load current is 100mA, the undershoot and the overshoot of the line transient response are 4 mV and 6.5 mV, respectively, for a 1 V step supply waveform with 5 μs transient time.
一种快速自反应无电容低差调节器
采用0.35μm CMOS技术实现了一种具有三瞬态改进回路的快速自反应(FSR)低差(LDO)稳压器。提出的SoC应用稳压器可以实现负载电流从零到100mA的高稳定性。FSR回路可以加速负载瞬态响应,而稳压器在没有输出电容的情况下仅实现0.00675 (ps)的FOM。实验结果表明,负载稳压为75.2 μV/mA,线路稳压为1.046 mV/V。整个LDO芯片的静态电流为27 μA,最大输出电流为100mA,超低压降电压为142mV。所提出的FSR暂态改进回路可以有效地降低暂态电压过调和欠调。负载电流在0 ~ 100 mA之间切换,上升和下降时间均为1 μs,结果表明,最大过调量为25 mV,最大过调量为5 mV。当负载电流为100mA时,对于1 V阶跃电源波形,暂态时间为5 μs,线路暂态响应的过调量和过调量分别为4 mV和6.5 mV。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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