Designing HIPAOC: High Performance Architecture On Chip

Abstract

New high performance architectures combining high and low level techniques are widely used today, and FPGA-based designs offer excellent platforms for this kind of systems. There are a lot of multiprocessor systems implemented on FPGApsilas but they are very often application and platform specific. This paper describes the HIPAOC (high performance architecture on chip) system, a general purpose and reconfigurable high performance architecture implemented on a single FPGA. The proposed design is application and platform independent and furthermore, two different memory models, shared or distributed memory, can be used depending on the designer requirements. Therefore it is not only a multiprocessor on chip, it can be a multicomputer on chip too.