DC and Analog/RF Performance Analysis of Gate-Drain Underlapped and Channel Engineered TFET

Abstract

In this paper, the DC and RF performance of a dual material double gate-drain underlapped tunnel FET (DMUDG TFET) and a DMUDG TFET with channel pocketing (DMUDG-CP TFET) are analyzed. It has been shown in the work that the proposed devices delivered a high ON current without compromising the ambipolar current of a conventional DMDG TFET. The proposed structural engineering served the device to have a reasonably good subthreshold swing (SS) and optimize the gate capacitance and gate-to-drain capacitance. The electrical characteristics of the proposed devices are analyzed in terms of subthreshold swing, ambipolar current, intrinsic capacitances, cut-off frequency, and transconductance. The work aims to improve the analog performance of the proposed devices without forfeiting the digital performance much. A detailed simulation study of the proposed structures is performed using the Silvaco Atlas 2-D device simulator and compared with existing structures of contemporary literature. The study reveals that the proposed structures can be utilized in RF applications and low-power VLSI applications as well.