Designing parameterized signal processing ips for high level synthesis in a model based design environment

Abstract

Model based hardware/software synthesis can lead to fast and efficient embedded system implementations, by enabling quick design space exploration. High level hardware modeling and implementation can be accelerated by using functionally verified parameterized models that are optimized for high level hardware synthesis. Such models can be designed so that they can be easily integrated with a high level modeling environment, such as Simulink, and at the same time provide ample flexibility to perform design space exploration when mapped to hardware. During signal processing hardware design, the focus is mostly on the architectural representation (data parallelism, pipelining, memory access, etc.) to meet throughput requirement and on data path modeling to analyze the effects of quantization. In this paper we present our experience of modeling an FFT block that can be integrated with the Simulink model based design environment for simulation and verification, and later can be used to perform architectural design space exploration and hardware implementation with optimal data path selection. A key advantage of our model is that the very same bit-accurate C code is used for simulation and for high-level synthesis, because it has been written with both aspects in mind (while for software implementation either our code or the code provided by the Mathworks can be used equally well). To prove the feasibility of our proposed approach we synthesized our FFT for two DSP applications with very different performance and cost requirements, namely a frequency domain audio detector and a GPS acquisition algorithm, and compared it with existing manual implementations