Study the characteristics of the tunnel FET at 20 nm and explore the performance of clock buffers and inverters using tunnel FET

Abstract

As per Moore's Law, MOSFETs have encountered unfaltering, exponential scaling down of their basic measurements. As the size was decreased, working voltage was additionally lessened to keep up consistent electric fields. Be that as it may, the voltage did not scale at the same rate as transistor size. To overcome this difficulty, Tunnel FET has been emerged with superior performance enhancing promises. From the simulation, it has been found that the subthreshold swing of the Tunnel FET is 2.57 times smaller than the FinFET. Designed clock buffers and inverters with Tunnel FET also show better performance in power as well as speed.