A universal device model for nanoelectronic circuit simulation

Abstract

As nanoelectronics approaches the maturity needed for circuit level integration we will need modeling approaches that can capture non-classical behaviors in a compact manner. We propose a universal device model (UDM) that addresses the challenge of correctly balancing accuracy, complexity, and flexibility. The UDM qualitatively represents fundamental classical and quantum phenomena such that nanoelectronic circuit design and simulation become possible. We discuss the motivation behind this modeling approach as well as the underlying details of the model. Furthermore, we present circuit examples of the model in action.