Cost-analysis of 4-valued unary functions implemented using current-mode CMOS circuits

M. Abd-El-Barr, A. Al-Mutawa
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引用次数: 4

Abstract

In this paper we consider the use of the incremental-cost approach for synthesis of 4-valued one-variable functions for implementation using current-mode CMOS (CMCL) circuits. One of the main features of CMCL circuits is the availability of currents flowing in both directions. This should add a degree of freedom which in turn facilitate the use of both positive and negative current values. Intermediate signed functions (both negative and positive) can then be readily available inside the circuits. In this paper we show that efficient use of signed intermediate functions can lead to substantial cost reduction, in terms of the number of devices needed for the implementation of functions. The results obtained using two techniques that use incremental-cost approach for synthesis of 4-valued one-variable functions for CMCL implementation and which use signed intermediate functions are presented and compared.
用电流型CMOS电路实现的4值一元函数的成本分析
在本文中,我们考虑使用增量成本方法来合成4值单变量函数,以便在电流型CMOS (CMCL)电路中实现。CMCL电路的主要特点之一是双向电流的可用性。这将增加一定程度的自由度,从而促进正负电流值的使用。中间带符号函数(负的和正的)可以在电路中随时可用。在本文中,我们表明,就实现函数所需的设备数量而言,有效使用带符号的中间函数可以导致大幅降低成本。介绍并比较了用增量代价法合成四值单变量函数和用有符号中间函数实现CMCL的两种方法的结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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