Zero-standby-power Nonvolatile Standard Cell Memory Using FiCC for IoT Processors with Intermittent Operations

Abstract

A standard cell memory (SCM) is a memory constructed with standard cells and implemented by logic synthesis and automatic placement and routing, which enables stable operation in the low voltage region compared to an SRAM. In this paper, we show the measurement results of a nonvolatile SCM (NV-SCM) using a Fishbone-in-Cage Capacitor (FiCC), which is suitable for IoT processors with intermittent operations. The NV-SCM was fabricated in a 180 nm standard CMOS process technology. The area overhead from the nonvolatility of bit cells is 74%. We confirmed full functionality of the NV-SCM. In the normal read/write and the data restore operation, the NV-SCM can operate up to 21 MHz. The data retention time was 95 minutes when the write time to the nonvolatile memory was 0.3 seconds and the reading voltage was set to 1.4 V. The simulation results show that the proposed NV-SCM can reduce the energy consumption by 51.19% compared to a conventional volatile SCM when hybernation/normal operation time ratio is 500.