Context-Based Error Correction Scheme Using Recurrent Neural Network for Resilient and Efficient Intra-Chip Data Transmission

Naoto Sugaya, M. Natsui, T. Hanyu
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引用次数: 3

Abstract

An error correction scheme utilizing a brain-inspired learning algorithm, called Recurrent Neural Network (RNN), is proposed for resilient and efficient intra-chip data transmission. RNN has a feature to find partially-clustered time-series data stream from an input data stream and predict the next input data from previous input data stream, which can be utilized for realizing an error correction corresponding to the "context" of the data stream. Through the evaluation of intra-chip data transmission in a general-purpose 32-bit microprocessor, it is demonstrated that the proposed scheme performs 95.9% error reduction with 2-times better data transfer efficiency and 94.2% error reduction with 4-times better data transfer efficiency compared with a conventional error correction scheme.
基于上下文的递归神经网络纠错方案用于弹性和高效的片内数据传输
提出了一种利用大脑启发学习算法的纠错方案,称为递归神经网络(RNN),用于弹性和高效的芯片内数据传输。RNN具有从输入数据流中找到部分聚类的时间序列数据流,并从之前的输入数据流中预测下一个输入数据的特点,可以利用这一点实现与数据流的“上下文”相对应的纠错。通过对通用32位微处理器芯片内数据传输的评估,表明该方案与传统纠错方案相比,误差减少95.9%,数据传输效率提高2倍,误差减少94.2%,数据传输效率提高4倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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