Improving the performance of an FPGA based Model design for sensor monitoring using PlanAhead tool

K. Arshak, E. Jafer, C. Ibala
{"title":"Improving the performance of an FPGA based Model design for sensor monitoring using PlanAhead tool","authors":"K. Arshak, E. Jafer, C. Ibala","doi":"10.1109/BMAS.2006.283476","DOIUrl":null,"url":null,"abstract":"The study in this paper is focused on the improvement of a field programmable gate arrays (FPGA) based design using a hierarchical analysis tool offered by XILINX PlanAheadtrade. During this work, PlanAhead software is used to address any problems on the physical side of our FPGA design flow in order to add more visibility and control. The target system is reading analog information recorded by a biomedical sensor in a transmitting unit attached to the patient. The recorded data is converted digitally using analog to digital converter (ADC) and sent to FSK transmitter through FPGA. Verilog HDL has been used to develop and implement the required functions of the FPGA, such as bus interfacing, data buffering, compression and framing. The system performance has been optimized using a recent comprehensive tool in order to reach and maintain the goals of the design","PeriodicalId":235383,"journal":{"name":"2006 IEEE International Behavioral Modeling and Simulation Workshop","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International Behavioral Modeling and Simulation Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BMAS.2006.283476","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

The study in this paper is focused on the improvement of a field programmable gate arrays (FPGA) based design using a hierarchical analysis tool offered by XILINX PlanAheadtrade. During this work, PlanAhead software is used to address any problems on the physical side of our FPGA design flow in order to add more visibility and control. The target system is reading analog information recorded by a biomedical sensor in a transmitting unit attached to the patient. The recorded data is converted digitally using analog to digital converter (ADC) and sent to FSK transmitter through FPGA. Verilog HDL has been used to develop and implement the required functions of the FPGA, such as bus interfacing, data buffering, compression and framing. The system performance has been optimized using a recent comprehensive tool in order to reach and maintain the goals of the design
利用PlanAhead工具改进基于FPGA的传感器监测模型设计
本文的研究重点是利用XILINX PlanAheadtrade提供的分层分析工具对基于现场可编程门阵列(FPGA)的设计进行改进。在这项工作中,PlanAhead软件用于解决FPGA设计流程的物理方面的任何问题,以增加更多的可见性和控制。目标系统正在读取由附着在患者身上的传输单元中的生物医学传感器记录的模拟信息。记录的数据通过模数转换器(ADC)进行数字转换,并通过FPGA发送到FSK发射机。Verilog HDL已被用于开发和实现FPGA所需的功能,如总线接口,数据缓冲,压缩和帧。为了达到和保持设计目标,系统性能已经使用最新的综合工具进行了优化
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信