{"title":"A performance analysis of Hetero- Dielectric Dual-Material-Gate silicon-on-insulator tunnel field effect transistors (HD-DMG SOI TFETs)","authors":"S. Mathew, S. Medhi, P. Tiwari","doi":"10.1109/INDICON.2014.7030627","DOIUrl":null,"url":null,"abstract":"In this work, an investigation into the performance of Hetero-Dielectric Dual-Material-Gate SOI Tunnel FET (HD-DMG SOI TFET) by varying the work functions of both tunnel and auxiliary gates and analysing its influence on the transfer characteristics and the threshold voltage is done. With a suitable combination of work functions of both the tunnel and auxiliary gates, steeper Id-Vg variations and ION to IOFF ratio as high as 1.6×1011 has been achieved. It has also been found that using a high K dielectric near the tunnel junction and low K dielectric near the drain junction enhances the tunneling ON current. A comparison of electrical characteristics of HD-DMG-SOI TFET with that of Single Dielectric Dual Material Gate SOI Tunnel FET (SD-DMG SOI TFET) is also presented.","PeriodicalId":409794,"journal":{"name":"2014 Annual IEEE India Conference (INDICON)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 Annual IEEE India Conference (INDICON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INDICON.2014.7030627","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
In this work, an investigation into the performance of Hetero-Dielectric Dual-Material-Gate SOI Tunnel FET (HD-DMG SOI TFET) by varying the work functions of both tunnel and auxiliary gates and analysing its influence on the transfer characteristics and the threshold voltage is done. With a suitable combination of work functions of both the tunnel and auxiliary gates, steeper Id-Vg variations and ION to IOFF ratio as high as 1.6×1011 has been achieved. It has also been found that using a high K dielectric near the tunnel junction and low K dielectric near the drain junction enhances the tunneling ON current. A comparison of electrical characteristics of HD-DMG-SOI TFET with that of Single Dielectric Dual Material Gate SOI Tunnel FET (SD-DMG SOI TFET) is also presented.