A 2.4GHz BLE-compliant fully-integrated wakeup receiver for latency-critical IoT applications using a 2-dimensional wakeup pattern in 90nm CMOS

M. Ding, Peng Zhang, Chuang Lu, Yan Zhang, Stefano Traferro, G. van Schaik, Yao-Hong Liu, J. Huijts, Christian Bachmann, G. Dolmans, K. Philips
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引用次数: 20

Abstract

This paper presents a wakeup receiver for latency-critical IoT applications in 90nm CMOS, which is fully compliant to many popular IoT wireless standards with constant envelope modulations, such as Bluetooth Low Energy and IEEE802.15.4. Paired with a standard-compliant transmitter, the proposed wakeup receiver method minimizes the overhead in system power, area and complexity. The proposed 2-dimensional wakeup pattern reduces the latency of a wakeup event to below 100µs. Supplied at a battery voltage of 2V, the chip fully integrates a power management unit, a wakeup receiver with offset and noise suppression, a low power digital baseband with automatic gain control and RSSI estimation, and a crystal oscillator. With a BLE compliant signal, the chip achieves −58dBm sensitivity, and a >600s mean time without false alarm, consuming 195µA.
2.4GHz ble兼容全集成唤醒接收器,适用于延迟关键型物联网应用,采用90nm CMOS二维唤醒模式
本文介绍了一种用于延迟关键型物联网应用的90nm CMOS唤醒接收器,该接收器完全符合许多流行的物联网无线标准,具有恒定的包络调制,如低功耗蓝牙和IEEE802.15.4。与符合标准的发射器配对,所提出的唤醒接收器方法最大限度地减少了系统功率,面积和复杂性的开销。提出的二维唤醒模式将唤醒事件的延迟时间降低到100µs以下。该芯片在2V电池电压下供电,完全集成了电源管理单元、带失调和噪声抑制的唤醒接收器、带自动增益控制和RSSI估计的低功耗数字基带和晶体振荡器。在符合BLE标准的信号下,该芯片的灵敏度为−58dBm,平均无虚警时间>600s,功耗为195µa。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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