A 256K SRAM with on-chip power supply conversion

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1987.1157185

A. Roberts, J. Dreibelbis, G. Braceras, J. Gabric, L. Gilbert, R. Goodwin, E. Hedberg, T. Maffitt, L. Meuniar, D. Moran, P. Nguyen, D. Reed, D. Reismiller, R. Sasaki

引用次数: 12

Abstract

A 47.2mm2SRAM utilizing an on-chip power supply conversion and allowing full synchronous operation at either 5.0V or 3.3V pin voltage without performance penalty will be discussed. The chip with a six-device cell size of 109μm2has been built in a 0.7μm CMOS DRAM technology with silicides and double level metal. Access times is 30ns, with less than 100mA active current consumption.

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带有片上电源转换的256K SRAM

一种47.2mm2SRAM利用片上电源转换，允许在5.0V或3.3V引脚电压下完全同步操作，而不会影响性能。该芯片采用硅化物和双能级金属的0.7μm CMOS DRAM技术，6个器件尺寸为109μm2。访问时间为30ns，有效电流消耗小于100mA。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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