Hardware Implementation of Convolutional Neural Networks Based on Residue Number System

Abstract

The paper examines the use of residue number system (RNS) for hardware implementation of neural networks based on VLSI or FPGA. Widely known mobile neural networks that are highly accurate and best suited for implementation at hardware level have been explored. Major difficulties in their RNS implementationare examined. Several methods for solving the related problems are proposed: convolutions with step value greater than one, rather than previously used MaxPooling layers, are considered; non-standard activation functions containing only addition, subtraction and multiplication are investigated; efficient algorithm for scaling implementation is proposed and compared with conventional algorithm. Finally, we propose complete flow for design and transfer of MobileNet neural network to hardware level on RNS basis.