The reliability of amorphous silicon thin film transistors for LCD under DC and AC stresses

Abstract

In this paper, hydrogenated amorphous silicon and polycrystalline silicon thin film transistors have been stressed with various conditions including DC and AC. Charge trapping and defect state creation are the two mechanisms to degrade the transfer characteristics of the TFTs. For a-Si:H TFTs, the charge trapping occurs at a high silicon content in silicon nitride (SiN/sub x/) gate dielectrics or performs at high gate electrical field. Defect state creation dominates at low hydrogen concentration in a-Si:H. At the performance of AC signal, the degradation of transfer curves is associated with bias, frequency, and duty cycle. The characteristics of a-Si:H TFTs shift more with increasing bias voltage and duty cycle. For the frequency effect, the transfer characteristics of a-Si:H TFTs decrease with increasing AC frequency under negative AC signal stress, however, they are independent of the frequency under positive AC signal stress.