Diagnosis of faults in template-based asynchronous circuits

Abstract

This paper presents an intrinsically verifiable library of quasi delay insensitive asynchronous templates providing an efficient debugging platform for large asynchronous circuits. We proposed using state transition graph to determining necessary properties which must be checked. For every template of a pre-charged full buffer library, we defined PSL properties which are used as monitors verifying correctness of necessary handshaking protocols between templates under simulation. Experimental results show that with a 8% increase in simulation time, all faults in handshaking protocols can be detected.