Novel 3-D structure for ultra high density flash memory with VRAT (Vertical-Recess-Array-Transistor) and PIPE (Planarized Integration on the same PlanE)
Jiyoung Kim, A. Hong, M. Ogawa, Siguang Ma, E. B. Song, You-Sheng Lin, Je-Woo Han, U. Chung, K. Wang
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引用次数: 41
Abstract
A 3-D flash memory cell of VRAT (vertical-recess-array-transistor) has been fabricated using a unique and simple 3-D integration method of PIPE (planarized integration on the same plane), which allows for the successful implementation of ultra high density flash memory. In addition, procedures to increase the memory density further using another advanced structure, Zigzag-VRAT (Z-VRAT), are developed.