A 12-bit Current-Steering Segmented DAC with Digital Foreground Calibration

Abstract

This paper is devoted to the digital foreground calibration circuit for 12-bit current-steering segmented digital-to-analog converter (DAC). Elements of unary segment go through the calibration process. The design of the proposed calibration circuit and its internal blocks is discussed at functional level. The Monte-Carlo simulation is held, which results in determination of the calibration circuit parameters. The simulation of DAC transfer function before and after calibration shows the improvement of static nonlinearity.