PMOS arrays self-protection capability limitation

Abstract

A study of PMOS arrays self-protection capability, related HBM-TLP miscorrelation and HBM passing level windowing effect is presented. Based on experimental results and 2D mixed-mode numerical simulation analysis the physical mechanism of the PMOS self-protection limitation is determined to be a complex two-stage phenomenon. It is initiated by a “weak” isothermal avalanche-injection conductivity modulation followed by electro-thermal spatial current instability in the 1μs time domain due to the positive feedback between thermal carrier generation and local power dissipation. The follow-up measures to improve the PMOS array self-protection capability are discussed and validated.