Improved LDMOS for ESD Protection of High Voltage BCD Process

Abstract

LDMOS is widely used as an ESD protection device. In high voltage BCD technology. However, due to the use of low concentration medium voltage well in HV process, the LDMOS is easily damaged by the Kirk effect under ESD stress, and the robustness is very low. A novel LDMOS is proposed in this work by using a high concentration well to surround the drain intraditional LDMOS, which, achieves a high ESD robustness with a current level of 0.76A,and the Ron is reduced from the original 25Ω to 6.25Ω. In other hand ,in order to save the area, the conventional LDMOS-SCR has been improved by the drain terminal segment, which make the improved LDMOS-SCR maintain a high robustness while the device area is smaller than that of the conventional LDMOS-SCR, thereby improving the area efficiency.