Global control synthesis for an MIMD/FPGA machine

Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines Pub Date : 1994-04-10 DOI:10.1109/FPGA.1994.315603

P. Dhaussy, J. Filloque, B. Pottier, S. Rubini

引用次数: 20

Abstract

Embedding a FPGA circular array into MIMD architectures allows one to synthesize fine-grain circuits for global computation support. These circuits operate concurrently with the distributed applications. They provide specific speed-up or additional services, such as communication protocols or global controllers. This article describes an architectural model for such controllers with practical examples implemented on the ArMen FPGA-multiprocessor. A multi-assignment language derived from the UNITY formalism is proposed, to implement the controllers with a high degree of parallelism. Their hardware synthesis principles are given.<>

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一种MIMD/FPGA机器的全局控制综合

将FPGA圆形阵列嵌入到MIMD架构中，可以合成支持全局计算的细粒度电路。这些电路与分布式应用程序并行运行。它们提供特定的加速或附加服务，例如通信协议或全局控制器。本文描述了这种控制器的体系结构模型，并给出了在ArMen fpga多处理器上实现的实例。为了实现高度并行化的控制器，提出了一种派生自UNITY形式的多赋值语言。给出了它们的硬件合成原理。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines

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