Efficient image filtering and information reduction in reconfigurable logic

Abstract

An automatic sign detection system could be important in enhancing traffic safety. Such a system would have to be able to provide high speed processing in its real-time environment. In this paper, we show how one of the time consuming parts of a speed limit detection algorithm can be implemented in reconfigurable logic to speed up the processing. Results indicate that the present system would be able to handle 12 images per second.