Delay/Phase Regeneration Circuits

Abstract

Designs which require a phase relationship between two signals to be maintained along a link benefit from the use of repeaters which actively regenerate this relationship. This paper discusses some implementations of phase-regeneration circuits and attempts to introduce the reader to the issues encountered in the design of such circuitry. The paper proposes various design solutions for the dual-rail case, extending the work to the multiple-rail case. A novel device which is able to reconstruct a sequence of events is also presented, the transition sequence encoder. Simulation results are provided with discussion on the relative performance.