{"title":"Implementing C algorithms in reconfigurable hardware using C2Verilog","authors":"D. Soderman, Yuri Panchul","doi":"10.1109/FPGA.1998.707944","DOIUrl":null,"url":null,"abstract":"A new full featured ANSI C to synthesizable RTL Verilog compiler, C2Verilog, was used to implement several system-level algorithms in a variety of IC implementations. This paper discusses the results achieved implementing a compression-decompression, a prime number generation, and a sorting algorithm in reconfigurable hardware.","PeriodicalId":309841,"journal":{"name":"Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"38","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FPGA.1998.707944","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 38
Abstract
A new full featured ANSI C to synthesizable RTL Verilog compiler, C2Verilog, was used to implement several system-level algorithms in a variety of IC implementations. This paper discusses the results achieved implementing a compression-decompression, a prime number generation, and a sorting algorithm in reconfigurable hardware.