Implementing C algorithms in reconfigurable hardware using C2Verilog

D. Soderman, Yuri Panchul
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引用次数: 38

Abstract

A new full featured ANSI C to synthesizable RTL Verilog compiler, C2Verilog, was used to implement several system-level algorithms in a variety of IC implementations. This paper discusses the results achieved implementing a compression-decompression, a prime number generation, and a sorting algorithm in reconfigurable hardware.
使用C2Verilog在可重构硬件中实现C算法
一个新的全功能的ANSI C到可合成RTL Verilog编译器,C2Verilog,被用来在各种IC实现中实现几个系统级算法。本文讨论了在可重构硬件中实现压缩-解压缩、质数生成和排序算法所获得的结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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