A novel BiCMOS circuit using a base boost technique for low voltage application

K. Ohhata, H. Nambu, K. Kanetani, T. Masuda, T. Kusunoki, N. Homma
{"title":"A novel BiCMOS circuit using a base boost technique for low voltage application","authors":"K. Ohhata, H. Nambu, K. Kanetani, T. Masuda, T. Kusunoki, N. Homma","doi":"10.1109/VLSIC.1995.520714","DOIUrl":null,"url":null,"abstract":"The high-speed performance of BiCMOS logic circuits is mostly lost under low-power supply voltage conditions. This is because the output swing is decreased due to the built-in voltage of the emitter-base junction (VBE). To overcome this problem, full-swing operation must be achieved. Transiently Saturated Full-Swing (TS-FS) BiCMOS logic circuit has achieved full-swing operation. This circuit, however, requires a high-performance pnp transistor, therefore, it introduces a drawback of high manufacturing cost. This paper proposes a novel BiCMOS logic circuit for low voltage application. It can operate at supply voltages as low as 1-1.5 V without a pnp transistor.","PeriodicalId":256846,"journal":{"name":"Digest of Technical Papers., Symposium on VLSI Circuits.","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Technical Papers., Symposium on VLSI Circuits.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1995.520714","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

The high-speed performance of BiCMOS logic circuits is mostly lost under low-power supply voltage conditions. This is because the output swing is decreased due to the built-in voltage of the emitter-base junction (VBE). To overcome this problem, full-swing operation must be achieved. Transiently Saturated Full-Swing (TS-FS) BiCMOS logic circuit has achieved full-swing operation. This circuit, however, requires a high-performance pnp transistor, therefore, it introduces a drawback of high manufacturing cost. This paper proposes a novel BiCMOS logic circuit for low voltage application. It can operate at supply voltages as low as 1-1.5 V without a pnp transistor.
采用基极升压技术的新型低压BiCMOS电路
BiCMOS逻辑电路的高速性能大多是在低电源电压条件下丧失的。这是因为由于发射基极结(VBE)的内置电压,输出摆幅减小了。为了克服这一问题,必须实现全速运行。暂态饱和全摆幅(TS-FS) BiCMOS逻辑电路实现了全摆幅工作。然而,这种电路需要一个高性能的pnp晶体管,因此,它引入了高制造成本的缺点。本文提出了一种新型的低电压BiCMOS逻辑电路。它可以在低至1-1.5 V的电源电压下工作,而无需pnp晶体管。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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