Optimum Placement of Two Rectangular Blocks

Abstract

This paper deals with a special case of the hierarchical layout of custom VLSI circuits. It presents the analysis as well as an algorithm for the placement of two rectangular blocks, where the objective function is to minimize the total layout area including the interconnect space. Block placement transformations, such as translations and rotations are considered. Sharing of tracks by more than one wire segment is also allowed. Extension to the more general case dealing with n blocks is being investigated.